Within an electronic computing device, a computing device may have multiple components that interact with each other and operate at varying voltage domains. In order for communications between the two or more components, data signals from a source component must be shifted from a first voltage domain to a different voltage domain of a destination component.
FIGS. 1a-1b illustrate block diagrams for voltage domain crossings of a computing device. Referring to FIG. 1a, a core voltage domain 10 is used to operate a processing core (not shown). The processing core communicates to input and output (“I/O”) devices operating in an IO voltage domain 12, where the core voltage domain 10 and the IO voltage domain 12 are at different voltage ranges. The processing core is powered by a VDD_core voltage of the core voltage domain 10, and the I/O devices can be powered by a VDD_IO voltage of the IO voltage domain 12.
A voltage level shifter (not shown) can be used to convert the data signals between the core voltage domain 10 and the IO voltage domain 12. Referring to FIG. 1b, a data input (“DI”) signal 14 is transferred from the core voltage domain 10 to the IO voltage domain 12. The voltage level shifter shifts the DI signal 14 to a data output (“DO”) signal 16. The DO signal 16 is in the IO voltage domain 12 such that the signal can be used by the IO devices.
As integrated circuits' feature size continue to decrease and their frequency of operation increase, power density will also increase, thereby increasing the operational temperature. This leads to operating error and reliability issues for the integrated circuits (“ICs”). In order to keep the power density at reasonable level, operating voltages for core logic are being lowered to 0.8V or lower. However, power supplies remain higher than core voltage (e.g., 1.1 to 1.65V). As a result, a voltage level shifter is used to transfer the digital data from low voltage to a high voltage domain, and vice versa.
Voltage level shifters are used in many interface applications, e.g., double data rate (“DDR”) interface, low power DDR interface, serial-to-deserial interface, analog-to-digital interface, digital-to-analog interface, and many other interfaces with multiple power supplies. An ideal level shifter shifts the input signal to a different level without the following drawbacks including any distortions to the duty cycle, any distortions to the rise and fall characteristics of the signal, and large delays. However, conventional level shifters have high latency, inconsistent performance over various combinations of the voltage level extremes, and/or distorted duty cycle in high-speed interface applications. This can have significant impact on data bandwidth as well as jitter.
Therefore, it is desirable to provide new methods, apparatuses, and systems for voltage level shifters that can have lower latency and more consistent performance.